1. Lovely Professional University
  2. Ph.D Thesis
  3. Ph.D Thesis
Please use this identifier to cite or link to this item: http://localhost:8080/xmlui/handle/123456789/4642
Title: Design and anaysis of a novel hybrid 8 x 8 BIT multiply and accumulate (MAC) architecture using clock gating scheme for pipelined processing
Authors: Sharma, Rajkumar
Bhargava, Cherry
Jain, Shruti
Keywords: Electronics and Electrical Engineering
Issue Date: 2020
Publisher: Lovely Professional University, Phagwara
URI: http://localhost:8080/xmlui/handle/123456789/4642
Appears in Collections:Ph.D Thesis

Files in This Item:
File Description SizeFormat 
AD 399.pdf10.76 MBAdobe PDFView/Open
Show full item record


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.