Please use this identifier to cite or link to this item:
http://localhost:8080/xmlui/handle/123456789/7308
Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Nagar, Sheetal | - |
dc.contributor.author | Saxena, Shanky | - |
dc.contributor.author | Patel, Govind Singh | - |
dc.contributor.author | Nayak, Seema | - |
dc.date.accessioned | 2025-08-28T04:59:08Z | - |
dc.date.available | 2025-08-28T04:59:08Z | - |
dc.date.issued | 2025 | - |
dc.identifier.uri | http://localhost:8080/xmlui/handle/123456789/7308 | - |
dc.language.iso | en_US | en_US |
dc.publisher | Lovely Professional University, Phagwara | en_US |
dc.subject | Electrical engineering | en_US |
dc.title | Design and optimization of approximate low power multiplier for dsp application | en_US |
dc.type | Thesis | en_US |
Appears in Collections: | Ph.D Thesis |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
41900673_SHEETAL_2025.pdf | 3.22 MB | Adobe PDF | View/Open |
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